Commit ef27c6c7 authored by Daniel Schultz's avatar Daniel Schultz
Browse files
parent ff10c3b5
Application-Independent System on Chip
RTL generation
cd AISoC/hw/
export XILINX="/opt/Xilinx/Vivado/2017.1"
make rtl
In this step we need the generated RTL from the previous step. Next, build the bitstream:
make syn
Flash the binary from EDA/Xilinx/syn/output/AISoC_top.bin to a Nexys4 DDR board. This demo application has a small ROM code with an endless loop of reading the board switches position and output them to the LEDs. Switch SW15 is connected with the SoC reset signal, SW0 to SW14 control the LEDs.
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